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About the Role

You will work on the physical design and methodology for future designs of high-performance processor chips in a leading-edge CMOS process technology, targeted at server and networking applications. This position offers an exciting platform to engage with diverse engineering challenges within a collaborative and innovative environment.

Responsibilities

• Work with design teams across various disciplines such as Digital/RTL/Analog to ensure design convergence and integration in a timely manner.
• Implement/support designs with multi-voltage designs through all aspects of implementation (place and route, static timing, physical verification) using industry standard EDA tools.
• Work with RTL design teams to drive assembly and design closure.
• Provide technical direction, coaching, and mentoring to junior employees and colleagues when necessary to achieve successful project outcomes.
• Write scripts in Shell, Python, and TCL to extract data and achieve productivity enhancements through automation.

Requirements

• Bachelor’s degree in Computer Science, Electrical Engineering or related fields and 5-10 years of related professional experience or Master’s degree and/or PhD in Computer Science, Electrical Engineering or related fields with 3-5 years of experience or equivalent professional experience in lieu of a formal degree.
• 5+ years experience in back-end physical design.
• Expertise in full-chip & sub-hierarchy integration.
• Experience integrating and taping out large designs utilizing a digital design environment.
• Good understanding of RTL to GDS flows and methodology.
• Good scripting skills in Perl, tcl and Python.
• Good understanding of digital logic and computer architecture.
• Knowledge of Verilog.
• Good communication skills and self-discipline contributing in a team environment.
• Working knowledge of static timing analysis tools such as Tempus or PrimeTime and EM/IR-Drop/Crosstalk analysis tools like Voltus or PrimeRail is advantageous.
• Working knowledge of physical verification and formal verification tools (e.g., Calibre, LEC, Formality) is advantageous.
• Experience with multi-voltage and low-power design techniques is advantageous.
• Experience with Cadence Innovus is preferred.
• Applicants must be eligible to access export-controlled information as defined under applicable law.
• All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.

Skills

• Shell scripting
• Python scripting
• TCL scripting
• Perl scripting
• Verilog
• Static timing analysis
• EM/IR-Drop/Crosstalk analysis
• Physical verification
• Formal verification
• Multi-voltage design techniques
• Low-power design techniques
• Cadence Innovus

Location

• Multiple office locations

Work Type

• Full-time
• On-site

Experience Level

• 5-10 years of related professional experience (with Bachelor's)
• 3-5 years of experience (with Master's/PhD)
• 5+ years experience in back-end physical design

Education Level

• Bachelor’s degree in Computer Science, Electrical Engineering or related fields
• Master’s degree in Computer Science, Electrical Engineering or related fields
• PhD in Computer Science, Electrical Engineering or related fields

Salary/Compensations

• 132,500 - 196,140 USD per annum

Benefits

• Relocation assistance is available for qualified candidates.
• Employee stock purchase plan with a 2-year look back.
• Family support programs.
• Robust mental health resources.
• Recognition and service awards.

About the Company

• Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world.
• Across enterprise, cloud and AI, automotive, and carrier architectures, our innovative technology is enabling new possibilities.
• At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow.
• For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead.

Equal Opportunity

• All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.
• Any applicant who requires a reasonable accommodation during the selection process should contact Marvell HR Helpdesk at TAOps@marvell.com.