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About the Role

As a senior leader in the central physical design team, you will shape the long-term vision for physical design capabilities and infrastructure in alignment with company-wide technology strategy. You will lead RTL-to-GDSII implementation for multiple SoC programs, overseeing synthesis, floorplanning, power grid design, place and route, clock tree synthesis, timing closure, power/signal integrity signoff, and physical verification. You will provide strategic leadership and technical direction to physical design teams, ensuring successful and timely tapeouts of complex, high-performance SoCs. Additionally, you will mentor and develop engineering talent, foster a culture of innovation, collaboration, and continuous improvement, and oversee team structure, hiring, performance management, and career development. You will drive cross-functional collaboration with design teams to influence design decisions and ensure successful project execution, navigate and resolve cross-functional conflicts, and drive the development and adoption of next-generation physical design methodologies, flows, and automation.

Responsibilities

Shape the long-term vision for physical design capabilities and infrastructure in alignment with company-wide technology strategy
Lead RTL-to-GDSII implementation for multiple SoC programs, overseeing synthesis, floorplanning, power grid design, place and route, clock tree synthesis, timing closure, power/signal integrity signoff, and physical verification (DRC/LVS)
Provide strategic leadership and technical direction to physical design teams, ensuring successful and timely tapeouts of complex, high-performance SoCs
Mentor and develop engineering talent, fostering a culture of innovation, collaboration, and continuous improvement
Oversee team structure, hiring, performance management, and career development to build and retain a high-performing physical design organization
Drive cross-functional collaboration with design teams to influence design decisions and ensure successful project execution
Navigate and resolve cross-functional conflicts effectively, fostering alignment and maintaining momentum across diverse teams
Drive the development and adoption of next-generation physical design methodologies, flows, and automation to improve productivity and design quality

Requirements

Bachelor’s degree in Computer Science, Electrical Engineering or related fields and 15+ years of related professional experience or Master’s degree in Computer Science, Electrical Engineering or related fields with 10-12 years of experience or PhD in Computer Science, Electrical Engineering or related fields with 8-10 years of experience or equivalent professional experience in lieu of a formal degree
15+ years of progressive experience in back-end physical design and verification, including significant leadership roles
Proven track record of leading and scaling physical design teams, managing complex SoC projects, and delivering high-quality tapeouts under aggressive schedules
Deep expertise in hierarchical physical design strategies, methodologies, and advanced process node challenges
In-depth understanding of current design technologies used in major foundries
Strong understanding of ASIC design flow, RTL integration, synthesis, and timing closure
In-depth knowledge of modern EDA tools and flows
Proficient in automation and scripting using Makefile, Tcl, Python, or Perl to enhance design efficiency and flow robustness
Strong communication and collaboration skills, with the ability to influence cross-functional teams and executive stakeholders
Experience in developing and deploying advanced physical design methodologies and flows
Strong knowledge on static timing analysis (PrimeTime, Tempus), EM/IR-Drop/crosstalk analysis (PTSI, Voltus, Redhawk, PrimeRail), extraction (Quantus, StarRC), formal or physical verification (Formality, Verplex, Calibre, Hercules) a plus
Familiarity with AI/ML-driven optimization in physical design tools is a plus
This position may require access to technology and/or software subject to U.S. export control laws and regulations, including the Export Administration Regulations (EAR). As such, applicants must be eligible to access export-controlled information as defined under applicable law.
Except for U.S. citizens, lawful permanent residents, or protected individuals as defined by 8 U.S.C. 1324b(a)(3), all applicants may be subject to an export license review process prior to employment.

Skills

Physical design
Methodology
RTL-to-GDSII implementation
Synthesis
Floorplanning
Power grid design
Place and route
Clock tree synthesis
Timing closure
Power/signal integrity signoff
Physical verification (DRC/LVS)
Automation
Scripting (Makefile, Tcl, Python, Perl)
Static timing analysis (PrimeTime, Tempus)
EM/IR-Drop/crosstalk analysis (PTSI, Voltus, Redhawk, PrimeRail)
Extraction (Quantus, StarRC)
Formal or physical verification (Formality, Verplex, Calibre, Hercules)
AI/ML-driven optimization in physical design tools

Location

Remote

Work Type

Full-time

Experience Level

Senior leader
15+ years of related professional experience
10-12 years of experience
8-10 years of experience
15+ years of progressive experience in back-end physical design and verification

Education Level

Bachelor’s degree in Computer Science, Electrical Engineering or related fields
Master’s degree in Computer Science, Electrical Engineering or related fields
PhD in Computer Science, Electrical Engineering or related fields

Salary/Compensations

179,900 - 266,180 USD per annum

Benefits

Employee stock purchase plan with a 2-year look back
Family support programs
Robust mental health resources
Recognition and service awards

About the Company

Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world.
Across enterprise, cloud and AI, automotive, and carrier architectures, our innovative technology is enabling new possibilities.
At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow.
For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead.

Equal Opportunity

All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.
Any applicant who requires a reasonable accommodation during the selection process should contact Marvell HR Helpdesk at TAOps@marvell.com.