DFT Engineer (Senior to Staff level) at Qualcomm | CAN | Rezi

DFT Engineer (Senior to Staff level) at Qualcomm

DFT Engineer (Senior to Staff level)

Qualcomm · CAN

1 months ago

DFT Engineer (Senior to Staff level)

Qualcomm · CAN

a month ago
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About the Role

As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm DFT Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements.

Responsibilities

  • Act as a member of Qualcomm's central DFT methodology group responsible for developing, maintaining and supporting flows across all company business units and projects.
  • Architect methodologies and flows for an integrated, RTL centric "shift left" DFT environment across company IPs, ASICs and SoC designs.
  • Write and automate RTL for advanced DFT and DFD features not currently supported by the EDA vendors.
  • Develop automated verification test bench and sequence creation for DFT IP.
  • Architect end-to-end verification solutions from static design checks, through formal and sequence-based verification.
  • Build IP/block and SoC level scan insertion flows and script ATPG retargeting procedures.
  • Create automated QoR checks for implementation quality control.
  • Write static timing constraints, create waivers and devise flows for bullet proof timing checks.

Requirements

  • Bachelor's degree in engineering science, Electrical and Computer Engineering or Computer Science.
  • 10+ years of experience in complex SoC designs in RTL, DFT or FE capacity.
  • Vast experience with various DFT EDA tools from Siemens, SNPS and Cadence.
  • Good knowledge and understanding in Verilog/VHDL and SystemVerilog.
  • Exposure to CAD and automation.
  • Good exposure for using de-Perl techniques in creating generic codes.
  • Extensively experienced with main DFT standards such as JTAG (1149.1/1149.6/1500), iJTAG (1687) and BIST techniques (memory BIST, logic BIST, interconnect BISTs).
  • Track record in integrating custom made DFT logic for complex SoCs (System-On-Chip) and CoWoS (Chip-On-Wafer-On-Substrate) designs is highly desirable.
  • Experience in SoC and IP/Block level scan insertion and ATPG, simulation of zero delay and SDF annotated test sequences.

Skills

  • TCL
  • Python

Location

  • Canada

Work Type

  • Full-time

Experience Level

  • Senior Technical Roles

Education Level

  • Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field
  • Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field
  • PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field

Salary/Compensations

  • $89,600.00 - $134,400.00

Benefits

  • Competitive annual discretionary bonus program
  • Opportunity for annual RSU grants
  • Highly competitive benefits package

About the Company

  • Qualcomm Canada ULC is a leading technology innovator.
  • Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law.

Equal Opportunity

  • Qualcomm is an equal opportunity employer.
  • Qualcomm is committed to providing an accessible process for individuals with disabilities.
  • Qualcomm is also committed to making our workplace accessible for individuals with disabilities.