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About the Role

We are seeking an AMD GPU performance engineer to enhance vLLM's capabilities across the AMD accelerator ecosystem. You will develop and optimize AMD GPU backends, kernels, runtime paths, and benchmarking infrastructure using ROCm, HIP, Triton, CK, AITER, and related tools to achieve top-tier inference performance on AMD GPUs. Your work will focus on inference systems, kernels, compilers, and hardware architecture, improving critical performance paths like attention, GEMM, sampling, KV cache, and communication-heavy operations to ensure vLLM's AMD GPU support is robust, fast, well-benchmarked, and maintainable.

Responsibilities

Build and optimize AMD GPU backends, kernels, runtime paths, and benchmarking infrastructure using ROCm, HIP, Triton, CK, AITER, and related tooling.
Improve performance-critical paths such as attention, GEMM, sampling, KV cache, and communication-heavy operations.
Make AMD GPU support in vLLM usable, fast, benchmarked, and maintainable.

Requirements

Bachelor's degree or equivalent experience in computer science, engineering, systems, machine learning, or similar.
Hands-on experience optimizing AMD GPU workloads using ROCm, HIP, Triton, CK, AITER, or similar AMD ecosystem tools.
Deep understanding of AMD GPU execution, memory behavior, toolchains, kernel performance, and backend-specific performance constraints.
Experience optimizing ML kernels or inference paths such as attention, GEMM, sampling, KV cache, fused kernels, or communication-heavy runtime paths.
Strong performance profiling and benchmarking skills, with the ability to use measurements, hardware counters, correctness tests, and reproducible benchmarks to guide optimization work.
Experience with vLLM, SGLang, TensorRT-LLM, ROCm-based serving, or other LLM inference systems.
Familiarity with batching, KV cache, decoding, serving tradeoffs, and backend performance constraints in production inference systems.
Experience with compiler and kernel technologies such as Triton, MLIR, LLVM, CK, AITER, HIP, or other kernel DSLs and backend libraries.
Knowledge of quantization methods such as INT8, FP8, mixed precision, or AMD hardware-specific numeric formats, including accuracy and performance tradeoffs.
Contributed to vLLM, ROCm, HIP, Triton, CK, AITER, PyTorch, compiler projects, or other open-source ML infrastructure.
Built AMD GPU benchmarking infrastructure or automated performance regression detection for accelerator workloads.
Worked directly with AMD, accelerator platform teams, or early-access programs to ship backend, compiler, or inference performance improvements.

Skills

ROCm
HIP
Triton
CK
AITER
AMD GPU performance optimization
ML kernel optimization
Inference path optimization
Performance profiling
Benchmarking
vLLM
SGLang
TensorRT-LLM
ROCm-based serving
LLM inference systems
Batching
KV cache
Decoding
Serving tradeoffs
Compiler technologies
Kernel technologies
MLIR
LLVM
Kernel DSLs
Backend libraries
Quantization methods
INT8
FP8
Mixed precision
Open-source ML infrastructure
AMD GPU benchmarking infrastructure
Automated performance regression detection

Location

San Francisco, California
Remote in the US

Work Type

Onsite
Remote

Experience Level

Mid-level
Senior

Education Level

Bachelor's degree or equivalent experience

Salary/Compensations

$200,000 - $400,000 USD + equity

Benefits

Generous health, dental, and vision benefits
401(k) company match

About the Company

Inferact's mission is to grow vLLM as the world's AI inference engine and accelerate AI progress by making inference cheaper and faster.
Founded by the creators and core maintainers of vLLM, we sit at the intersection of models and hardware, a position that took years to build.