Sr. Staff ASIC Design Methodology Engineer, AI HW at Tenstorrent Unlisted/Referral Jobs | Canada | Rezi

Sr. Staff ASIC Design Methodology Engineer, AI HW at Tenstorrent Unlisted/Referral Jobs

Sr. Staff ASIC Design Methodology Engineer, AI HW

Tenstorrent Unlisted/Referral Jobs · Canada

1 months ago

Sr. Staff ASIC Design Methodology Engineer, AI HW

Tenstorrent Unlisted/Referral Jobs · Canada

a month ago
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About the Role

Tenstorrent is seeking a Sr. Staff ASIC Design Methodology Engineer to advance our design infrastructure and flows across RTL development, verification, and physical implementation for our core AI compute engines. This role is ideal for senior engineers focused on improving design quality, enabling scalability, and automating methodologies to accelerate silicon success.

Responsibilities

  • Develop and maintain ASIC design methodologies and infrastructure for RTL development and integration within the Tensix team.
  • Own and evolve static code analysis (Lint, CDC, RDC, DFT) and RTL-netlist logic equivalency design methodologies to ensure high-quality AI hardware delivery.
  • Develop synthesis timing constraints (SDC) and low power design specifications (UPF) to optimize the power-efficiency of our AI compute engines.
  • Support RTL-to-GDS flow enablement, ensuring clean handoffs and sign-off readiness for our cutting-edge AI SoCs.
  • Collaborate with EDA vendors and internal tool owners to optimize performance, quality, and runtime for Tensix-specific workloads.

Requirements

  • Strong advocate for design quality and productivity with deep expertise in ASIC design flows and a track record of leading methodology improvements.
  • Skilled in RTL design and an expert in static and dynamic analysis tools tailored for high-performance AI hardware.
  • Technical leader comfortable automating design checks and improving methodology for scalability and reuse across complex Tensix core configurations.
  • Collaborative engineer who partners effectively across RTL, verification, and backend teams to ensure seamless execution.
  • Eligible to access U.S. export-controlled technology.

Skills

  • ASIC design flows
  • RTL design
  • Static analysis tools
  • Dynamic analysis tools
  • Lint
  • CDC
  • RDC
  • DFT
  • Logic equivalency
  • Synthesis timing constraints (SDC)
  • Low power design specifications (UPF)
  • RTL-to-GDS flow
  • RISC-V integration

Location

  • Toronto, ON

Work Type

  • Hybrid

Experience Level

  • Senior
  • Staff

Salary/Compensations

  • $100k - $500k

Benefits

  • Highly competitive compensation package

About the Company

  • Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency.
  • With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors.
  • Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible.
  • We value collaboration, curiosity, and a commitment to solving hard problems.
  • We are growing our team and looking for contributors of all seniorities.

Equal Opportunity

  • Tenstorrent offers a highly competitive compensation package and benefits, and we are an equal opportunity employer.