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About the Role

Lead the layout of GaN power devices according to design rules and required standards, ensuring high quality, high yield, and timely delivery. Provide technical leadership to the layout team, developing and applying new tools and techniques to improve work efficiency and accuracy.

Responsibilities

• Perform block and top-level layout and verification using LVS, DRC, ERC, and other required checks.
• Ensure layouts meet the highest standards, free from device mismatch, electromigration, parasitic effects, latch-up, and ESD weakness.
• Manage and track layout schedules to ensure on-time tape-out.
• Prepare tape-out databases and documentation.
• Attend and participate in relevant project meetings, keeping the project manager informed of achievements, issues, and potential risks.
• Learn new tool features and procedures with minimal supervision, proactively sharing knowledge with peers.
• Set up Design Environment (DE) and update or create DRC decks with support and training.
• Execute tape-out and post-layout activities, including reticle design, mask generation, foundry communication, and mask release.
• Coordinate and delegate work between the design team and the layout team.
• Develop and implement new workflows, including new layout and verification tools, to improve layout team capability.

Requirements

• BS degree (EE major preferred).
• At least 8 years of experience in semiconductor layout.
• Familiarity with Cadence Virtuoso, Layout XL, Calibre, and Unix.
• Understanding of basic electrical properties.
• Good communication skills.
• Knowledge in integrated circuit electronics, including device level cross-section, analog, and transistor level circuits (plus).
• Power discrete device layout experience (plus).
• L-edit experience (plus).

Skills

• Cadence Virtuoso
• Layout XL
• Calibre
• Unix
• Basic electrical properties
• Integrated circuit electronics (device level cross-section, analog, transistor level circuit)
• Communication skills
• Power discrete device layout
• L-edit

Location

• Hybrid (2 days remote, 3 days in office: Tuesday to Thursday)

Work Type

• Regular
• Permanent
• Hybrid

Experience Level

• At least 8 years of experience in semiconductor layout

Education Level

• BS degree (EE major preferred)

Benefits

• Flexible work arrangements (e.g., remote work system)
• Support for employee resource groups
• Inclusive workplace environment
• Employee-first culture
• Global support system

About the Company

• Renesas provides embedded semiconductor solutions under the purpose "To Make Our Lives Easier".
• A leader in embedded semiconductors, offering high-quality and system-level expertise.
• Provides scalable and comprehensive solutions for automotive, industrial, infrastructure, and IoT sectors.
• Product portfolio includes high-performance computing, embedded processing, analog & connectivity, and power.
• Operates in over 30 countries with more than 22,000 diverse employees.
• Committed to enriching user experience through digitalization and pioneering new innovation.
• Dedicated to developing sustainable and energy-efficient solutions for global communities.