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About the Role

The position involves executing a verification plan on digital IP blocks using a combination of simulation and formal verification techniques. The qualified candidate will interact with cross-functional teams to receive specs, create, and execute verification plans, and debug IP and system-level issues. Based on project needs, the candidate will debug chip level tests for functionality, power, and performance.

Responsibilities

Block and IP Verification
Create and execute the test plan with emphasis on metrics driven verification
Constrained random tests, scoreboard, and coverage development
Validate block power and performance requirements
Apply formal verification tools like lint, auto, and property checks
System Level Verification
Debug functional failures at subsystem and SoC levels
Perform gate-level verification across corners and provide activity files for power analysis
Architect and implement Verification Components using UVM-based methods
Develop verification flows and methodologies to enhance IP, SoC, and Formal Verification

Requirements

Minimum Qualifications
10+ years of design verification experience
Bachelor's or Master's degree in Electrical/Computer Engineering
Strong knowledge of Verilog, SystemVerilog, UVM, and C/C++
Knowledge of digital design, ARM, or RISC-V architecture and bus protocols
Knowledge of CPU subsystem and memory controller verification
Knowledge of scripting languages like Perl, Python, Tcl, and shell
Experience in architecting complex verification environments from scratch
Advanced verification skill in SVAs, constrained random stimulus, and coverage analysis
C-based testcase development and debugging skills
Experience with artificial intelligence (AI) powered tools and technologies used to enhance productivity, analysis, and decision-making
Familiarity with Flash/RRAM Controller architecture
Verification and debug of low-power design with UPF
Technical leadership and mentoring experience
Good written and oral communication skills

Skills

Verilog
SystemVerilog
UVM
C/C++
digital design
ARM
RISC-V architecture
bus protocols
CPU subsystem verification
memory controller verification
Perl
Python
Tcl
shell scripting
SVAs
constrained random stimulus
coverage analysis
C-based testcase development
debugging
artificial intelligence (AI) powered tools
Flash/RRAM Controller architecture
low-power design
UPF
Technical leadership
mentoring
written communication
oral communication

Location

Austin, TX

Work Type

Hybrid

Experience Level

Senior Staff
10+ years of design verification experience

Education Level

Bachelor's degree in Electrical/Computer Engineering
Master's degree in Electrical/Computer Engineering

Salary/Compensations

$143,150 - $265,850 USD

Benefits

Great medical (Choice of PPO or Consumer Driven Health Plan with HSA)
dental and vision plans
Highly competitive salary
401k plan with match and Roth plan option
Equity rewards (RSUs)
Life/AD&D and disability coverage
Flexible spending accounts
Adoption assistance
Back-Up childcare
Commuter benefits
Legal benefits
Pet insurance
Flexible PTO schedule
3 paid volunteer days per year
Charitable contribution match
Tuition reimbursement
Free downtown parking
Onsite gym
Monthly wellness offerings
Free snacks

About the Company

Silicon Labs (NASDAQ: SLAB) is the leading innovator in low-power wireless connectivity, building embedded technology that connects devices and improves lives.
Merging cutting-edge technology into the world’s most highly integrated SoCs, Silicon Labs provides device makers the solutions, support, and ecosystems needed to create advanced edge connectivity applications.
Headquartered in Austin, Texas, Silicon Labs has operations in over 16 countries and is the trusted partner for innovative solutions in the smart home, industrial IoT, and smart cities markets.
Learn more at www.silabs.com.
We are focused on producing world-class Wireless MCU products.
The architecture specifications, design, verification, emulation, and implementation of the Wireless MCU SoCs are all the responsibilities of our team.
The IPs on our chip include an embedded CPU system with analog and digital peripherals, advanced security, advanced power management, and best in class low power wireless modems.
We strive to provide advanced technology solutions through innovation in custom RISC-V Cores and AI/ML accelerators.
At Silicon Labs, we hire and empower great talent to achieve their full potential.
By offering challenging projects, technical mentorship, and continuous learning opportunities, we ensure our employees thrive at every stage of their careers.
Here, you’ll work alongside some of the industry’s brightest minds, tackling complex problems that deepen your expertise and expand your horizons.
Whether you’re building new skills or shaping your career path, we’re dedicated to supporting your growth and celebrating your success every step of the way.

Equal Opportunity

Silicon Labs is an equal opportunity employer and values the diversity of our employees.
Employment decisions are made on the basis of qualifications and job-related criteria without regard to race, religion, color, national origin, gender, sexual orientation, age, marital status, veteran status, or disability status, or any other characteristic protected by applicable law.