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About the Role

Tenstorrent leads the industry in cutting-edge AI technology, revolutionizing performance, ease of use, and cost efficiency. The company's diverse team develops high-performance RISC-V CPUs from scratch, driven by a passion for AI and a desire to build the best AI platform. This role involves owning CPU core-level testbench development and verification, shaping the behavior of out-of-order RISC-V CPUs in silicon.

Responsibilities

Lead hands-on CPU core-level testbench development for high-performance out-of-order RISC-V cores.
Own and evolve CVM-based verification methodology, infrastructure, and reusable testbench components.
Plan and drive functional verification for CPU core features, ISA behavior, and microarchitectural scenarios.
Develop UVM, assembly, C/C++ stimulus, and C++ functional models for RISC-V extensions and un-core components such as APIC and IOMMU.
Debug regressions, close coverage, and improve core, cluster, and chip-level testbenches across simulation, emulation, and post-silicon environments.
Develop testbench and tooling infrastructure combining Python orchestration with specialized AI agents to accelerate triage and root-cause analysis across logs, waveforms, and verification databases.

Requirements

8+ years in CPU verification, CPU testbench development, or closely related digital design.
Deep hands-on experience building and owning CPU core-level testbenches.
In-depth knowledge of high-performance out-of-order CPU microarchitecture.
Comfortable developing testbench infrastructure in CVM methodology, with UVM experience as a strong plus.
Comfortable working across RTL, waveforms, logs, regressions, and cross-functional debug with design, DV, emulation, and post-silicon teams.
Comfortable using AI-assisted verification workflows to improve debug, stimulus creation, and coverage analysis, applying strong engineering judgment to validate results.

Skills

CPU verification
CPU testbench development
Digital design
CVM methodology
UVM
High-performance out-of-order CPU microarchitecture
RTL
Waveform analysis
Log analysis
Regression debugging
Cross-functional debug
AI-assisted verification workflows
Python
C/C++
Assembly

Location

Austin, TX
Santa Clara, CA

Work Type

Hybrid

Experience Level

Various experience levels
8+ years in CPU verification, CPU testbench development, or related digital design

About the Company

Tenstorrent leads the industry in cutting-edge AI technology.
Revolutionizing performance expectations, ease of use, and cost efficiency in AI.
Developing high-performance RISC-V CPUs from scratch.
Building open, state-of-the-art compute for real workloads and developers.
Team values collaboration, curiosity, and a commitment to solving hard problems.

Equal Opportunity

This offer of employment is contingent upon the applicant being eligible to access U.S. export-controlled technology. Due to U.S. export laws, including those codified in the U.S. Export Administration Regulations (EAR), the Company is required to ensure compliance with these laws when transferring technology to nationals of certain countries (such as EAR Country Groups D:1, E1, and E2). These requirements apply to persons located in the U.S. and all countries outside the U.S. As the position offered will have direct and/or indirect access to information, systems, or technologies subject to these laws, the offer may be contingent upon your citizenship/permanent residency status or ability to obtain prior license approval from the U.S. Commerce Department or applicable federal agency. If employment is not possible due to U.S. export laws, any offer of employment will be rescinded.